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Please read problem #11 . Use the same memory and cache layout and… Please read problem #11 . Use the same memory and cache layout and determine for the 20 memory references below which ones are hits and which ones are misses. List each reference as a hit or miss and compute and list the overall hit rate. Assume the cache is already loaded where block 0 has tag 5, block 1 has tag 3, block 2 has tag 5 and block 3 has tag B. The 20 memory references are: 5A, 5B, 5C, BB, BC, 52, 53, 54, 1F, 20, 21, 2B, 2C, 2D, FD, FE, FF, 29, 2A, 2B. Since the references are in order, if there is a miss, you have to update the cache to keep track of what is currently stored. Your answer need only list whether each of the 20 accesses is a hit or miss (you don’t have to draw the cache as it updates) and the overall hit rate. Image transcription text#11. Suppose we have a computer that uses a memory address word size of 8 bits. This computer has a16-byte cache with 4 bytes per block. The computer accesses a number of memory locations throughout thecourse of running a program. Suppose this computer uses direct-mapped cache. The format of a … Show more… Show more  Engineering & Technology Computer Science CSC 362

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